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? 1996-2011 microchip technology inc. ds21178h-page 1 24aa00/24lc00/24c00 device selection table features: single supply with operation down to 1.8v for 24aa00 devices, 2.5v for 24lc00 devices low-power cmos technology: - read current 500 ? a, typical - standby current 100 na, typical 2-wire serial interface, i 2 c? compatible schmitt trigger inputs for noise suppression output slope control to eliminate ground bounce 100 khz and 400 khz clock compatibility page write time 3 ms, typical self-timed erase/write cycle esd protection >4000v more than 1 million erase/write cycles data retention >200 years factory programming available packages include 8-lead pdip, soic, tssop, dfn, tdfn and 5-lead sot-23 pb-free and rohs compliant temperature ranges available: - industrial (i): -40 ? c to +85 ? c - automotive (e): -40 ? c to +125 ? c description: the microchip technology inc. 24aa00/24lc00/ 24c00 (24xx00*) is a 128-bit electrically erasable prom memory organized as 16 x 8 with a 2-wire serial interface. low-voltage design permits operation down to 1.8 volts for the 24aa00 version, and every version maintains a maximum standby current of only 1 ? a and typical active current of only 500 ? a. this device was designed for where a small amount of eeprom is needed for the storage of calibration values, id numbers or manufacturing information, etc. the 24xx00 is available in 8-pin pdip, 8-pin soic (3.90 mm), 8-pin tssop, 8-pin 2x3 dfn, tdfn and the 5-pin sot-23 packages. package types block diagram device v cc range temp range 24aa00 1.8-5.5 i 24lc00 2.5-5.5 i 24c00 4.5-5.5 i,e 12 3 4 87 6 5 15 4 3 8-pin pdip/soic 8-pin tssop 5-pin sot-23 nc nc nc vss v cc nc scl sda ncnc nc v ss v cc nc scl sda scl v ss sda v cc nc 12 3 4 87 6 5 2 dfn/tdfn nc nc nc v ss nc scl sda v cc 87 6 5 1 2 3 4 hv generator eeprom array ydec xdec sense amp r/w control memory control logic i/o control logic sda scl v cc v ss 128-bit i 2 c ? bus serial eeprom *24xx00 is used in this document as a generic part number for the 24aa00/24lc00/24c00 devices. i 2 c is a trademark of philips corporation. downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 2 ? 1996-2011 microchip technology inc. 1.0 electrical characteristics absolute maximum ratings (?) v cc .............................................................................................................................................................................6.5v all inputs and outputs w.r.t. v ss ......................................................................................................... -0.6v to v cc +1.0v storage temperature ............................................................................................................ ...................-65c to +150c ambient temperature with power applied ......................................................................................... .......-40c to +125c esd protection on all pins ..................................................................................................... .....................................4 kv figure 1-1: bus timing data ? notice: stresses above those listed under absolute maximum ratings may cause permanent dam age to the device. this is a stress rating only and functional operation of the device at those or any other condi tions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. table 1-1: dc characteristics all parameters apply across the recommended operating ranges unless otherwise noted industrial (i): t a = -40c to +85c, v cc = 1.8v to 5.5v automotive (e) t a = -40c to +125c, v cc = 4.5v to 5.5v parameter symbol min. max. units conditions scl and sda pins: high-level input voltage v ih 0.7 v cc v (note) low-level input voltage v il 0 . 3 v cc v (note) hysteresis of schmitt trigger inputs v hys .05 v cc vv cc ? 2.5v (note) low-level output voltage v ol 0 . 4v i ol = 3.0 ma, v cc = 4.5v i ol = 2.1 ma, v cc = 2.5v input leakage current i li 1 ? av in = v cc or v ss output leakage current i lo 1 ? av out = v cc or v ss pin capacitance (all inputs/outputs) c in , c out 1 0p f v cc = 5.0v (note) t a = 25c, f clk = 1 mhz operating current i cc write 2 ma v cc = 5.5v, scl = 400 khz i cc read 1 ma v cc = 5.5v, scl = 400 khz standby current i ccs 1 ? av cc = 5.5v, sda = scl = v cc note: this parameter is periodically sampled and not 100% tested. t f t high t r t su : sta t low t hd : dat t su : dat t su : sto t buf t aa t sp sclsda in sda out t hd : sta downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 3 24aa00/24lc00/24c00 table 1-2: ac characteristics all parameters apply across all recommended operating ranges unless otherwise noted industrial (i) : t a = -40c to +85c, v cc = 1.8v to 5.5v automotive (e): t a = -40c to +125c, v cc = 4.5v to 5.5v parameter symbol min max units conditions clock frequency f clk 100 100 400 khz 4.5v ?? vcc ? 5.5v (e temp range) 1.8v ?? vcc ?? 4.5v 4.5v ?? vcc ? 5.5v clock high time t high 4000 4000 600 ns 4.5v ?? vcc ? 5.5v (e temp range) 1.8v ?? vcc ?? 4.5v 4.5v ?? vcc ? 5.5v clock low time t low 4700 4700 1300 ns 4.5v ?? vcc ? 5.5v (e temp range) 1.8v ?? vcc ?? 4.5v 4.5v ?? vcc ? 5.5v sda and scl rise time (note 1) t r 1000 1000 300 ns 4.5v ?? vcc ? 5.5v (e temp range) 1.8v ?? vcc ?? 4.5v 4.5v ?? vcc ? 5.5v sda and scl fall time t f 3 0 0n s (note 1) start condition hold time t hd : sta 4000 4000 600 ns 4.5v ?? vcc ? 5.5v (e temp range) 1.8v ?? vcc ?? 4.5v 4.5v ?? vcc ? 5.5v start condition setup time t su : sta 4700 4700 600 ns 4.5v ?? vcc ? 5.5v (e temp range) 1.8v ?? vcc ?? 4.5v 4.5v ?? vcc ? 5.5v data input hold time t hd : dat 0n s (note 2) data input setup time t su : dat 250 250 100 ns 4.5v ?? vcc ? 5.5v (e temp range) 1.8v ?? vcc ?? 4.5v 4.5v ?? vcc ? 5.5v stop condition setup time t su : sto 4000 4000 600 ns 4.5v ?? vcc ? 5.5v (e temp range) 1.8v ?? vcc ?? 4.5v 4.5v ?? vcc ? 5.5v output valid from clock (note 2) t aa 3500 3500 900 ns 4.5v ?? vcc ? 5.5v (e temp range) 1.8v ?? vcc ?? 4.5v 4.5v ?? vcc ? 5.5v bus free time: time the bus must be free before a new transmis- sion can start t buf 4700 4700 1300 ns 4.5v ?? vcc ? 5.5v (e temp range) 1.8v ?? vcc ?? 4.5v 4.5v ?? vcc ? 5.5v output fall time from v ih minimum to v il maximum t of 20+0.1 cb 250 ns (note 1) , cb ?? 100 pf input filter spike suppression (sda and scl pins) t sp 5 0n s (notes 1, 3) write cycle time t wc 4m s endurance 1m cycles (note 4) note 1: not 100% tested. c b = total capacitance of one bus line in pf. 2: as a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of scl to avoid unintended generation of start or stop conditions. 3: the combined t sp and v hys specifications are due to new schmitt trigger inputs which provide improved noise spike suppression. this eliminates the need for a ti specification for standard operation. 4: this parameter is not tested but ensured by characterization. for endu rance estimates in a specific application, please consult the total endurance? model which can be obtained at www.microchip.com. downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 4 ? 1996-2011 microchip technology inc. 2.0 pin descriptions pin function table 2.1 sda serial data this is a bidirectional pin used to transfer addresses and data into and data out of the device. it is an open drain terminal, therefore the sda bus requires a pull-up resistor to v cc (typical 10 k ? for 100 khz, 2 k ? for 400 khz). for normal data transfer sda is allowed to change only during scl low. changes during scl high are reserved for indicating the start and stop conditions. 2.2 scl serial clock this input is used to synchronize the data transfer from and to the device. 2.3 noise protection the scl and sda inputs have schmitt trigger and filter circuits which suppress noise spikes to assure proper device operation even on a noisy bus. name pdip soic tssop dfn (1) tdfn (1) sot-23 description nc 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 not connected v ss 4 4 4 4 4 2 ground sda 5 5 5 5 5 3 serial address/data i/o scl 6 6 6 6 6 1 serial clock wp 7 7 7 7 7 5 write-protect input v cc 8 8 8 8 8 4 +1.8v to 5.5v power supply note 1: the exposed pad on the dfn/tdfn packages can be connected to v ss or left floating. downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 5 24aa00/24lc00/24c00 3.0 functional description the 24xx00 supports a bidirectional 2-wire bus and data transmission protocol. a device that sends data onto the bus is defined as a transmitter, and a device receiving data as a receiver. the bus has to be controlled by a master device which generates the serial clock (scl), controls the bus access, and generates the start and stop conditions, while the 24xx00 works as slave. both master and slave can operate as transmitter or receiver, but the master device determines which mode is activated. 4.0 bus characteristics the following bus protocol has been defined: data transfer may be initiated only when the bus is not busy. during data transfer, the data line must remain stable whenever the clock line is high. changes in the data line while the clock line is high will be interpreted as a start or stop condition. accordingly, the following bus conditions have been defined (figure 4-1). 4.1 bus not busy (a) both data and clock lines remain high. 4.2 start data transfer (b) a high-to-low transition of the sda line while the clock (scl) is high determines a start condition. all commands must be preceded by a start condition. 4.3 stop data transfer (c) a low-to-high transition of the sda line while the clock (scl) is high determines a stop condition. all operations must be ended with a stop condition. 4.4 data valid (d) the state of the data line represents valid data when, after a start condition, the data line is stable for the duration of the high period of the clock signal. the data on the line must be changed during the low period of the clock signal. there is one bit of data per clock pulse. each data transfer is initiated with a start condition and terminated with a stop condition. the number of the data bytes transferred between the start and stop conditions is determined by the master device and is theoretically unlimited. downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 6 ? 1996-2011 microchip technology inc. 4.5 acknowledge each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. the master device must generate an extra clock pulse which is associated with this acknowledge bit. the device that acknowledges has to pull down the sda line during the acknowledge clock pulse in such a way that the sda line is stable low during the high period of the acknowledge related clock pulse. of course, setup and hold times must be taken into account. a master must signal an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. in this case, the slave must leave the data line high to enable the master to generate the stop condition (figure 4-2). figure 4-1: data transfer sequence on the serial bus figure 4-2: acknowledge timing note: the 24xx00 does not generate any acknowledge bits if an internal program- ming cycle is in progress. (a) (b) (c) (d) (a) (c) scl sda start condition address or acknowledge valid data allowed to change stop condition scl 9 8 7 6 5 4 3 2 1 123 transmitter must release the sda line at this point allowing the receiver to pull the sda line low to acknowledge the previous eight bits of data. receiver must release the sda line at this point so the transmitter can continue sending data. data from transmitter data from transmitter sda acknowledge bit downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 7 24aa00/24lc00/24c00 5.0 device addressing after generating a start condition, the bus master transmits a control byte consisting of a slave address and a read/write bit that indicates what type of operation is to be performed. the slave address for the 24xx00 consists of a 4-bit device code 1010 followed by three dont care bits. the last bit of the control byte determines the operation to be performed. when set to a one a read operation is selected, and when set to a zero a write operation is selected (figure 5-1). the 24xx00 monitors the bus for its corresponding slave address all the time. it generates an acknowledge bit if the slave address was true and it is not in a programming mode. figure 5-1: control byte format 1010xxx sa c k r/w device select bits dont care bits slave address acknowledge bit start bit read/write bit downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 8 ? 1996-2011 microchip technology inc. 6.0 write operations 6.1 byte write following the start signal from the master, the device code (4 bits), the dont care bits (3 bits), and the r/w bit (which is a logic low) are placed onto the bus by the master transmitter. this indicates to the addressed slave receiver that a byte with a word address will follow after it has generated an acknowledge bit during the ninth clock cycle. therefore, the next byte transmit- ted by the master is the word address and will be written into the address pointer of the 24xx00. only the lower four address bits are used by the device, and the upper four bits are dont cares. the 24xx00 will acknowledge the address byte and the master device will then transmit the data word to be written into the addressed memory location. the 24xx00 acknowl- edges again and the master generates a stop condition. this initiates the internal write cycle, and during this time the 24xx00 will not generate acknowl- edge signals (figure 6-1). after a byte write command, the internal address counter will not be incremented and will point to the same address location that was just written. if a stop bit is transmitted to the device at any point in the write command sequence before the entire sequence is complete, then the command will abort and no data will be written. if more than 8 data bits are transmitted before the stop bit is sent, then the device will clear the previously loaded byte and begin loading the data buffer again. if more than one data byte is transmitted to the device and a stop bit is sent before a full eight data bits have been transmitted, then the write command will abort and no data will be written. the 24xx00 employs a v cc threshold detector circuit which disables the internal erase/write logic if the v cc is below 1.5v (24aa00 and 24lc00) or 3.8v (24c00) at nominal conditions. figure 6-1: byte write s p bus activity master sda line bus activity st a r t st o p control byte word address data ac k ac k ac k 10 x 10 x xx x = dont care bit xxx 0 downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 9 24aa00/24lc00/24c00 7.0 acknowledge polling since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). once the stop condition for a write command has been issued from the master, the device initiates the internally timed write cycle. ack polling can be initiated immediately. this involves the master sending a start condition followed by the control byte for a write command (r/w = 0 ). if the device is still busy with the write cycle, then no ack will be returned. if no ack is returned, then the start bit and control byte must be re-sent. if the cycle is complete, then the device will return the ack and the master can then proceed with the next read or write command. see figure 7-1 for flow diagram. figure 7-1: acknowledge polling flow send write command send stop condition to initiate write cycle send start send control byte with r/w = 0 did device acknowledge (ack = 0 )? next operation no yes downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 10 ? 1996-2011 microchip technology inc. 8.0 read operations read operations are initiated in the same way as write operations with the exception that the r/w bit of the slave address is set to one. there are three basic types of read operations: current address read, random read and sequential read. 8.1 current address read the 24xx00 contains an address counter that main- tains the address of the last word accessed, internally incremented by one. therefore, if the previous read access was to address n, the next current address read operation would access data from address n + 1. upon receipt of the slave address with the r/w bit set to one, the device issues an acknowledge and transmits the eight-bit data word. the master will not acknowledge the transfer, but does generate a stop condition and the device discontinues transmission (figure 8-1). 8.2 random read random read operations allow the master to access any memory location in a random manner. to perform this type of read operation, first the word address must be set. this is done by sending the word address to the device as part of a write operation. after the word address is sent, the master generates a start condition following the acknowledge. this termi- nates the write operation, but not before the internal address pointer is set. then the master issues the control byte again, but with the r/w bit set to a one. the 24xx00 will then issue an acknowledge and trans- mits the eight bit data word. the master will not acknowledge the transfer, but does generate a stop condition and the device discontinues transmission (figure 8-2). after this command, the internal address counter will point to the address location following the one that was just read. 8.3 sequential read sequential reads are initiated in the same way as a random read except that after the device transmits the first data byte, the master issues an acknowledge as opposed to a stop condition in a random read. this directs the device to transmit the next sequentially addressed 8-bit word (figure 8-3). to provide sequential reads the 24xx00 contains an internal address pointer which is incremented by one at the completion of each read operation. this address pointer allows the entire memory contents to be serially read during one operation. figure 8-1: current address read bus activity master sda line bus activity p s st o p control byte st a r t data ac k n o a c k 11 00xxx1 x = dont care bit downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 11 24aa00/24lc00/24c00 figure 8-2: random read figure 8-3: sequential read p bus activity master sda line bus activity st a r t st o p control byte ac k word address(n) control byte st a r t data (n) ac k ac k n o a c k xxxx s 11 00xxx0 s 11 0 0xxx1 x = dont care bit p bus activity master sda line bus activity st o p control byte ac k n o a c k data n data n + 1 data n + 2 data n + x ac k ac k ac k downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 12 ? 1996-2011 microchip technology inc. 9.0 packaging information 9.1 package marking information xxxxxxxxt/xxxnnn yyww 8-lead pdip (300 mil) example: 8-lead soic (3.90 mm) example: xxxxxxxt xxxxyyww nnn 8-lead tssop example: 24lc00 i/p 13f 0527 24lc00i sn 0527 13f xxxx tyww nnn 4l00 i527 13f 5-lead sot-23 example: xxnn m03f 8-lead 2x3 dfn example: 204527 13 xxx yww nn 3 e 3 e 8-lead 2x3 tdfn example: a04 527 13 xxx yww nn downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 13 24aa00/24lc00/24c00 part number 1st line marking codes tssop sot-23 dfn tdfn i temp. e temp. i temp. e temp. i temp. e temp. 24aa00 4a00 b0nn 201 a01 24lc00 4l00 m0nn 204 a04 24c00 4c00 d0nn e0nn 207 a07 a08 note: nn = alphanumeric traceability code legend: xx...x part number or part number code t temperature (i, e) y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week 01) nnn alphanumeric traceability code (2 characters for small packages) pb-free jedec designator for matte tin (sn) note : for very small packages with no room for the pb-free jedec designator , the marking will only appear on the outer carton or reel label. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e note: please visit www.microchip.com/pbfree for the latest information on pb-free conversion. * standard otp marking consists of microchip part number, year code, week code, and traceabili ty code. downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 14 ? 1996-2011 microchip technology inc. n e1 note 1 d 12 3 a a1 a2 l b1 b e e eb c downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 15 24aa00/24lc00/24c00 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 16 ? 1996-2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 17 24aa00/24lc00/24c00 downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 18 ? 1996-2011 microchip technology inc. d n e e1 note 1 12 b e c a a1 a2 l1 l downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 19 24aa00/24lc00/24c00 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 20 ? 1996-2011 microchip technology inc. d n e note 1 1 2 exposed pad note 1 2 1 d2 k l e2 n e b a3 a1 a note 2 bottom view top view downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 21 24aa00/24lc00/24c00 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 22 ? 1996-2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 23 24aa00/24lc00/24c00 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 24 ? 1996-2011 microchip technology inc. downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 25 24aa00/24lc00/24c00 n b e e1 d 1 2 3 e e1 a a1 a2 c l l1 downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 26 ? 1996-2011 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 27 24aa00/24lc00/24c00 appendix a: revision history revision e added dfn package. revision f (02/2007) revised device selection table; features section; changed 1.8v to 1.7v; revised tables 1-1, 1-2; revised product id system; replaced package drawings; replaced on-line support page. revision g (03/2007) replaced package drawings (rev. am). revision h (11/2011) added tdfn package. downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 28 ? 1996-2011 microchip technology inc. notes: downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 29 24aa00/24lc00/24c00 the microchip web site microchip provides online support via our www site at www.microchip.com . this web site is used as a means to make files and information easily available to customers. accessible by using your favorite internet browser, the web site contains the following information: product support C data sheets and errata, application notes and sample programs, design resources, users guides and hardware support documents, latest software releases and archived software general technical support C frequently asked questions (faq), technical support requests, online discussion groups, microchip consultant program member listing business of microchip C product selector and ordering guides, latest microchip press releases, listing of seminars and events, listings of microchip sales offices, distributors and factory representatives customer change notification service microchips customer notification service helps keep customers current on microchip products. subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. to register, access the microchip web site at www.microchip.com . under support, click on customer change notification and follow the registration instructions. customer support users of microchip products can receive assistance through several channels: distributor or representative local sales office field application engineer (fae) technical support development systems information line customers should contact their distributor, representative or field application engineer (fae) for support. local sales offices are also available to help customers. a listing of sales offices and locations is included in the back of this document. technical support is available through the web site at: http://microchip.com/support downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 30 ? 1996-2011 microchip technology inc. reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip product. if you wish to provide your comments on organization, clarity, subject matter, and ways in whic h our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-4150. please list the following information, and use this outline to provide us with your comments about this docume nt. to: technical publications manager re: reader response total pages sent ________ from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds21178h 24aa00/24lc00/24c00 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this document easy to follow? if not, why? 4. what additions to the document do you think would enhance the structure and subject? 5. what deletions from the document could be made without affecting the overall usefulness? 6. is there any incorrect or misleading information (what and where)? 7. how would you improve this document? downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page31 24aa00/24lc00/24c00 product identification system to order or obtain information, e.g. , on pricing or delivery, refer to the factory or the listed sales office. part no. x /xx package temperature range device device: 24aa00: = 1.8v, 128 bit i 2 c? serial eeprom 24aa00t: = 1.8v, 128 bit i 2 c serial eeprom (tape and reel) 24lc00: = 2.5v, 128 bit i 2 c serial eeprom 24lc00t: = 2.5v, 128 bit i 2 c serial eeprom (tape and reel) 24c00: = 5v, 128 bit i 2 c? serial eeprom 24c00t: = 5v, 128 bit i 2 c? serial eeprom (tape and reel) temperature range: i = -40c to +85c e = -40c to +125c package: p = plastic dip (300 mil body), 8-lead sn = plastic soic (3.90 mm body), 8-lead st = plastic tssop (4.4 mm), 8-lead ot = plastic sot-23, 5-lead (tape and reel only) mc = plastic dfn (2x3x0.9 mm body), 8-lead mny (1) = plastic tdfn, (2x3x0.75 mm body), 8-lead (tape and reel only) note 1: "y" indicates a nickel palladium gold (nipdau) finish. examples: a) 24aa00-i/p: industrial temperature,1.8v pdip package b) 24aa00-i/sn: industrial temperature, 1.8v, soic package c) 24aa00t-i/ot: industrial temperature, 1.8v, sot-23 package, tape and reel d) 24lc00-i/p: industrial temperature, 2.5v, pdip package e) 24c00-e/sn: extended temperature, 5v, soic package f) 24lc00t-i/ot: industrial temperature, 2.5v, sot-23 package, tape and reel g) 24c00t-i/mny: industrial temperature, 5v, tdfn pacakge downloaded from: http:///
24aa00/24lc00/24c00 ds21178h-page 32 ? 1996-2011 microchip technology inc. notes: downloaded from: http:///
? 1996-2011 microchip technology inc. ds21178h-page 33 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyers risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mxdev, mxlab, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, application maestro, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, total endurance, tsharc, uniwindriver, wiperlock and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 1996-2011, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 978-1-61341-767-6 note the following details of the code protection feature on microchip devices: microchip products meet the specification cont ained in their particular microchip data sheet. microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specif ications contained in microchips data sheets. most likely, the person doing so is engaged in theft of intellectual property. microchip is willing to work with the customer who is concerned about the integrity of their code. neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as unbreakable. code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchips code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the companys quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory an d analog products. in addition, microchips quality system for the design and manufacture of development systems is iso 9001:2000 certified. downloaded from: http:///
ds21178h-page 34 ? 1996-2011 microchip technology inc. americas corporate office 2355 west chandler blvd. chandler, az 85224-6199 tel: 480-792-7200 fax: 480-792-7277 technical support: http://www.microchip.com/ support web address: www.microchip.com atlanta duluth, ga tel: 678-957-9614 fax: 678-957-1455 boston westborough, ma tel: 774-760-0087 fax: 774-760-0088 chicago itasca, il tel: 630-285-0071 fax: 630-285-0075 cleveland independence, oh tel: 216-447-0464 fax: 216-447-0643 dallas addison, tx tel: 972-818-7423 fax: 972-818-2924 detroit farmington hills, mi tel: 248-538-2250 fax: 248-538-2260 indianapolis noblesville, in tel: 317-773-8323 fax: 317-773-5453 los angeles mission viejo, ca tel: 949-462-9523 fax: 949-462-9608 santa clara santa clara, ca tel: 408-961-6444 fax: 408-961-6445 toronto mississauga, ontario, canada tel: 905-673-0699 fax: 905-673-6509 asia/pacific asia pacific office suites 3707-14, 37th floor tower 6, the gateway harbour city, kowloon hong kong tel: 852-2401-1200 fax: 852-2401-3431 australia - sydney tel: 61-2-9868-6733 fax: 61-2-9868-6755 china - beijing tel: 86-10-8569-7000 fax: 86-10-8528-2104 china - chengdu tel: 86-28-8665-5511 fax: 86-28-8665-7889 china - chongqing tel: 86-23-8980-9588 fax: 86-23-8980-9500 china - hangzhou tel: 86-571-2819-3187 fax: 86-571-2819-3189 china - hong kong sar tel: 852-2401-1200 fax: 852-2401-3431 china - nanjing tel: 86-25-8473-2460 fax: 86-25-8473-2470 china - qingdao tel: 86-532-8502-7355 fax: 86-532-8502-7205 china - shanghai tel: 86-21-5407-5533 fax: 86-21-5407-5066 china - shenyang tel: 86-24-2334-2829 fax: 86-24-2334-2393 china - shenzhen tel: 86-755-8203-2660 fax: 86-755-8203-1760 china - wuhan tel: 86-27-5980-5300 fax: 86-27-5980-5118 china - xian tel: 86-29-8833-7252 fax: 86-29-8833-7256 china - xiamen tel: 86-592-2388138 fax: 86-592-2388130 china - zhuhai tel: 86-756-3210040 fax: 86-756-3210049 asia/pacific india - bangalore tel: 91-80-3090-4444 fax: 91-80-3090-4123 india - new delhi tel: 91-11-4160-8631 fax: 91-11-4160-8632 india - pune tel: 91-20-2566-1512 fax: 91-20-2566-1513 japan - yokohama tel: 81-45-471- 6166 fax: 81-45-471-6122 korea - daegu tel: 82-53-744-4301 fax: 82-53-744-4302 korea - seoul tel: 82-2-554-7200 fax: 82-2-558-5932 or 82-2-558-5934 malaysia - kuala lumpur tel: 60-3-6201-9857 fax: 60-3-6201-9859 malaysia - penang tel: 60-4-227-8870 fax: 60-4-227-4068 philippines - manila tel: 63-2-634-9065 fax: 63-2-634-9069 singapore tel: 65-6334-8870 fax: 65-6334-8850 taiwan - hsin chu tel: 886-3-5778-366 fax: 886-3-5770-955 taiwan - kaohsiung tel: 886-7-536-4818 fax: 886-7-330-9305 taiwan - taipei tel: 886-2-2500-6610 fax: 886-2-2508-0102 thailand - bangkok tel: 66-2-694-1351 fax: 66-2-694-1350 europe austria - wels tel: 43-7242-2244-39 fax: 43-7242-2244-393 denmark - copenhagen tel: 45-4450-2828 fax: 45-4485-2829 france - paris tel: 33-1-69-53-63-20 fax: 33-1-69-30-90-79 germany - munich tel: 49-89-627-144-0 fax: 49-89-627-144-44 italy - milan tel: 39-0331-742611 fax: 39-0331-466781 netherlands - drunen tel: 31-416-690399 fax: 31-416-690340 spain - madrid tel: 34-91-708-08-90 fax: 34-91-708-08-91 uk - wokingham tel: 44-118-921-5869 fax: 44-118-921-5820 worldwide sales and service 08/02/11 downloaded from: http:///

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